Over on the University of Reddit there’s a course for learning all about FPGAs and CPLDs. It’s just an introduction to digital logic, but with a teacher capable of building a CPLD motor control board ...
[Kodera2t] wanted to experiment with programmable logic. Instead of going with an FPGA board, he decided to build his own CPLD (complex programmable logic device) board, with a built-in programmer.
In its third major and field-programmable gate array (FPGA) announcement in the last 12 months, Lattice Semiconductor Corp. has introduced MachXO, a new product family that combines the key features ...
Designers of digital systems are familiar with implementing the 'leftovers' of their digital design by using FPGAs and CPLDs to glue together various processors, memories, and standard function ...
Adding to the CoolRunner-II CPLD family, the XC2C32A and XC2C64A debut in smaller MLF packages than their predecessors and integrate an additional I/O bank to support voltage level translation and ...
If you've ever wondered which FPGA/CPLD vendor offers the best performance at the lowest power, consider QuickLogic's Power Comparison Resource Package. Along with a corresponding Web site, it ...
This Design Idea further develops a previous one integrating a stepper-motor driver in a CPLD (Reference 1). However, this idea integrates not only the driver, but also a simple one-axis stepper-motor ...
MOUNTAIN VIEW, Calif., February 19, 2008 — Directly addressing design requirements for programmable solutions that meet ever-tightening power and cost budgets, Actel Corporation today announced the ...
HILLSBORO, OR - August 30, 2005 - Lattice Semiconductor Corporation (NASDAQ: LSCC) today announced that RAD Data Communications has selected the LatticeECâ„¢ FPGA as well as the ispMACHâ„¢ 4000 CPLD ...
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